Many high performance analog circuits receive and operate upon differential input signals. In order to function with a high level of accuracy, such a circuit has specific impedance matching requirements that must be met. These impedance matching requirements extend to the input signals including, for instance, differential input signals. As an example, a switched capacitor analog gain stage implemented within an integrated circuit (IC) can have a capacitive matching requirement of approximately 1 fF (femto-Farad) or less.
When the matching requirements are not met, accurate circuit operation is jeopardized and may be entirely unattainable. Unfortunately, the level of accuracy required in impedance matching is difficult to achieve given the variability inherent in any IC manufacturing process. An impedance mismatch in an analog circuit within an IC that renders the analog circuit inaccurate or inadequate for its intended purpose can render the entire IC unusable, thereby reducing IC yield.